New 3D silicon chip breakthrough could extend Mooreâs Law for years - Date: - May 30, 2026 - Source: - University of Illinois Grainger College of Engineering - Summary: - As traditional chip miniaturization slows, researchers have found a way to pack more computing power into the same space by stacking silicon circuits in multiple layers. The new process uses ultra-thin silicon membranes and low-temperature manufacturing techniques to overcome a major obstacle that has long blocked the production of true 3D chips. - Share: For decades, the computing industry has followed a simple formula: make transistors smaller and pack more of them onto a chip. That strategy fueled the extraordinary rise in computing power predicted by Moore's law. But as components approach atomic scales, engineers are increasingly running into the physical limits of silicon and the effects of quantum mechanics. Many researchers believe the next major advance will come not from shrinking devices further, but from building upward. A team led by University of Illinois Grainger College of Engineering materials science and engineering professor Qing Cao has demonstrated a new method for stacking multiple layers of silicon electronics directly on top of one another. The approach could dramatically increase computing density, improve performance, and reduce energy consumption while extending the progress that has driven the semiconductor industry for more than half a century. "Take something as simple as static random-access memory, which is universal in CPUs and GPUs. Today it takes six microelectronic devices called transistors on a single plane to store one bit of information. With vertical integration, you can distribute them across multiple layers. It's like replacing a sprawling suburb with high-rises: you get the same functionality, but the spatial footprint is reduced while making communication between layers faster and more efficient," Cao explained. The researchers report that